A Method of Directly Measuring the Input Differential Capacitance of Operational Amplifiers

Input capacitance may become a major specification for high impedance and high frequency operational amplifier (op amp) applications. It is worth noting that when the junction capacitance of the photodiode is small, the input capacitance of the op amp can become a dominant factor in noise and bandwidth problems. The op amp’s input capacitance and feedback resistance create a pole in the amplifier’s response, affecting stability and increasing noise gain at higher frequencies.

Introduction

Input capacitance may become a major specification for high impedance and high frequency operational amplifier (op amp) applications. It is worth noting that when the junction capacitance of the photodiode is small, the input capacitance of the op amp can become a dominant factor in noise and bandwidth problems. The op amp’s input capacitance and feedback resistance create a pole in the amplifier’s response, affecting stability and increasing noise gain at higher frequencies. Therefore, stability and phase margin may decrease, and output noise may increase. In fact, some of the previous CDM(Differential Mode Capacitance) measurement techniques are based on high impedance inverting circuits, stability analysis, and noise analysis. These methods can be very cumbersome.

In a feedback amplifier such as an op amp, the total effective input capacitance is given by CDMwith the negative input common-mode capacitor (or the C to groundCMC) in parallel. CDMOne of the reasons it is difficult to measure is that the main job of an op amp is to prevent the two inputs from being uncorrelated. with measurement CDMCompared to the difficulty of directly measuring the positive input common-mode capacitance C to groundCM+Relatively easy. By placing a large series resistor on the noninverting pin of the op amp and applying a sine wave or noise source, a network analyzer or spectrum analyzer can be used to measure the -3 dB frequency response due to the op amp’s input capacitance. Assuming CCM+and CCMCSame, especially for voltage feedback amplifiers. However, over the years, measuring CDMbecomes increasingly difficult; the inherent nature of the op amp forces its inputs to be equal, bootstrapping CDM, so the various techniques used are unsatisfactory. When the inputs are forced apart and a current measurement is made, the outputs will try to counteract. – detect CDMThe traditional method is indirect measurement, which relies on a reduction in phase margin, and due to the parallel use of CCMCIt becomes more complicated with other capacitors.

We expect the op amp to be tested to operate and function normally in closed loop conditions as the customer would normally use it. A suggested approach is to split the input and clip the output, but this may render the internal circuitry inoperable (depending on the opamp topology), so the measured capacitance may not reflect the actual operating capacitance. In this approach, the input is not over-separated to avoid input stage nonlinearity and excessive output swing or clipping. This article will introduce a simple and straightforward CDMMeasurement methods.

A Method of Directly Measuring the Input Differential Capacitance of Operational Amplifiers

Figure 1. Direct measurement of C in LTspiceDMimpedance. Plot the V(r)/I(R1) curve to get the impedance. In this example, at 1 MHz, Z is 19.89437kΩ at -89.996° (10(85.97/20)), using the formula C = 1/(2π × Z × Freq), Z is exactly 8 pF.

measure CDMnew method

The authors decided to just use a snubber circuit with a gain of 1, and use a current source to excite the output and the inverting input. The output and inverting input will only vary as far as the op amp allows. At low frequencies, there is little variation in the output, so through CDMcurrent will be small. At too high frequencies, the test may be invalid, and the results are useless. But at intermediate frequencies, the gain bandwidth of the op amp drops, but not so low that the output variation still provides a large enough voltage excitation and a measurable pass through CDMthe current.

LTspice®The noise floor is almost unlimited, so a simple test simulation can be performed, as shown in Figure 1. When the technique was found to be fairly accurate and effective in LTspice, the next question was “Can I get enough SNR to make a good measurement in the real world?”

This phase angle is almost equal to -90°, which indicates that the impedance is capacitive. The 2 pF common-mode capacitance will not spoil the measurement because CCMCis not in the path, and 1/(2 ×π × Freq × CCM+) >> 1 Ω.

Challenge: Find the right equipment and actual test setup

As shown in Figure 1, a 2 kΩ resistor is placed in series with the output of the op amp to convert the excitation from a voltage source to a current source. This will allow a small voltage in node “r” (it will not be too far from what is seen in the non-inverting pin of the op amp) and will cause a small current to flow into the C under testDMbetween the inputs. Of course, the output voltage is now small (buffered by the device under test (DUT)), and CDMThe current in is also small (57 nA in this simulation), so it would be difficult to measure with a 1 Ω resistor on a bench. The LTspice.ac and LTspice.tran simulations have no resistor noise, but a real-world 1 Ω resistor with 130 pA/√Hz of noise produces only a 57 nV signal from our expected 57 nA capacitor current. Further simulations show that replacing R1 with 50Ω or 1 kΩ does not result in a flow into C at frequencies within the target bandwidthCM+The current loss is too large. For a better current measurement technique than a simple resistor, a transimpedance amplifier (TIA) can be used in place of R1. The TIA input is connected to the non-inverting pin of the op amp where current is required and the voltage is fixed to virtual ground to eliminate CCMCcurrent in. In fact, this is exactly how four-port impedance analyzers such as the Keysight/Agilent HP4192A are implemented. The HP4192A can perform impedance measurements in the frequency range from 5 Hz to 13 MHz. Some new devices on the market using the same impedance measurement technique include the E4990A impedance analyzer with a 10 Hz to 120 MHz range and a precision LCR meter (like the Keysight E4980A) with a 20 Hz to 2 MHz range.

As shown in the test circuit in Figure 2 below, the non-inverting pin of the op amp remains in a virtual ground state due to the TIA inside the impedance analyzer. Because of this, CCM+Both terminals of the are considered to be at ground potential and therefore do not affect the measurement. C of DUTDMThe small current generated across both ends will flow through the feedback resistor R of the TIArthen measured by the internal voltmeter.


Figure 2.CDMTest the circuit.

Any use of an auto-balanced bridge1The impedance measurement method of the four-port device is to measure CDMsuitable choice. They are designed to generate a sine wave from an internal oscillator centered at zero with positive and negative swings for dual supply operation. If the op amp DUT is powered from a single supply, the bias function should be adjusted so that the signal does not clip to ground. The HP4192A is used in Figure 3 and the detailed connections to the DUT are shown.


Figure 3.CDMTest setup for the direct measurement method.

Figure 4 shows the exact test setup to make the board and wire pair CDMThe parasitic capacitance contribution is minimal. Any general-purpose board can be used for low-speed op amps, while high-speed op amps require more stringent PCB layout. Vertically grounded copper dividers ensure that the input and output terminals are not visible to the DUT CDMParallel other field paths.


Figure 4. HP4192A setup board demo. On the right is excitation and voltage readback through 2 kΩ. The DUT used is an LT1792 in an 8-pin SO package attached to an LB2223 experimenter board. The TIA is located on the left inside the HP4192A.

Results and discussion

First, the DUT is not used when measuring the board capacitance of the board. The board shown in Figure 4 was measured with a 16 fF capacitor and no DUT. This is a fairly small capacitance and can be neglected because usually CDMExpected values ​​are several hundred to several thousand fF.

Most JFET and CMOS input op amps were measurable using this new CDM measurement uses this new CDMMeasurement technique that can measure most JFET and CMOS input op amps. To illustrate the method, take the measurement of the LT1792, a low-noise precision JFET op amp as an example. The following table lists the impedance (Z), phase angle (θ), reactance X over a range of frequenciesSand CDMcalculated value. When the phase angle is -90°, the impedance behaves purely capacitive.

Table 1. LT1792 Impedance Measurements at Various Frequency with ±15 V Supply

frequency

Z (kΩ)

θ

XS (kΩ)

CS = CDM =
1/(2 ×π×XS × Freq) (pF)

500kHz

33

-89°

-32.9

9.7

600kHz

27

-90°

-26.9

9.8

700kHz

22.6

-90°

-22.6

10

800kHz

19.65

-90°

-19.7

10.1

900kHz

17.4

-90°

-17.4

10.2

1 MHz

15.64

-89.9°

-15.6

10.2

2 MHz

7.76

-89.8°

-7.76

10.25

3 MHz

5.1

-90°

-5.1

10.4

4 MHz

3.74

-90°

-3.74

10.6

5MHz

2.92

-90°

-2.92

10.9

Table 1 above gives the measurement results over the frequency range of 500 kHz to 5 MHz. The phase in this frequency range is close to purely capacitive (-89° to -90° phase angle). At the same time, the reactance XSdetermines the total input impedance, ie Z≈XS. CDMThe calculated average value of is about 10.2 pF. The highest measurement frequency is 5 MHz because the device bandwidth is only up to 5.6 MHz. Results at lower frequencies become incoherent. Presumably this is due to the behavior of the op amp causing the output voltage to drop, CDMcurrent is rapidly reduced while XSImpedance becomes larger at low frequencies.

The output of the op amp should also be checked at each step frequency to ensure that it is not overdriven by the signal produced by the impedance analyzer. The amplitude of this signal from the HP4192A is adjustable from 0.1 V to 1.1 V, which is just enough to create a swing in the output of the op amp and slightly shift the voltage level in the inverting input pin. Figure 5 shows that at 800 kHz, the peak-to-peak undistorted signal (green signal) at the output of the op amp is 28 mV. The yellow signal of 2.76 V peak-to-peak amplitude (1 V rms) is detected directly from the oscillator output port of the analyzer. To be fair, the decision to disallow output distortion is arbitrary, either for the DUT or the HP4192A detector. Although this setup is relatively unaffected by probe effects, the probe has been removed when acquiring the actual data for impedance and phase.


Figure 5. Detected output at HP4192A “Osc” output port and op amp output pin.

We carried out measurements of C at different supply voltagesDM‘s test. CDMDependencies on supply and common-mode voltage will vary from op amp to op amp; different topologies and transistor types are expected to result in different junction parasitics for high-voltage and low-voltage supplies. Table 2 shows the results for the LT1792 when the power supply is stable within ±5 V. CDMThe measured average value of 9.2 pF is quite close to the result of 10 pF with a ±15 V supply. Therefore, it can be concluded that the C of the LT1792DMDoes not change significantly with changes in supply voltage. This is the same as CCMIn stark contrast, the latter varies significantly with supply voltage.

Table 2. LT1792 Impedance Measurements at Various Frequency with ±5 V Supply

frequency

Z (kΩ)

θ

XS (kΩ)

CS = CDM (pF)

500kHz

37

-90°

-37

8.6

600kHz

30

-91°

-30

8.8

700kHz

25.3

-91°

-25.2

9

800kHz

twenty two

-91°

-twenty two

9

900kHz

19.5

-91°

-19.5

9

1 MHz

17.5

-91°

-17.5

9.1

2 MHz

8.62

-92°

-8.62

9.2

3 MHz

5.6

-93°

-5.6

9.5

4 MHz

4.07

-94°

-4.07

9.8

5MHz

3.14

-94°

-3.14

10.1

Meanwhile, bipolar input op amps are almost as simple as their FET counterparts. However, since they are related to CDMThe currents are in parallel, so their high input bias current and current noise are noticeable. In addition, the inherent differential resistance R inherent to the bipolar differential pair inputDMalso with CDMin parallel. Table 3 shows the impedance measurement of the low-noise precision amplifier ADA4004 as an example. Obviously, phase does not indicate purely capacitive behavior, since it is far from -90°. Although the 4 MHz, 5 MHz and 10 MHz frequencies are very close, a parallel equivalent impedance RC model will fit this example to be able to extract C from the other resistorsDM. Therefore, the parallel conductance G over a range of frequencies is shown in Table 3Psusceptance BPand CDMThe calculated value of , which assumes CPequal to CDM.

Table 3. ADA4004 Impedance Measurements Over Frequency Range with ±15 V Supply

frequency

Z (kΩ)

θ

GP (μS)

BP (μS)

CP = CDM =
BP/(2 ×π × Freq) (pF)

500kHz

29.4

-36°

27.5

20

6.4

600kHz

27.2

-41°

27.6

24.1

6.4

700kHz

25.3

-45.4°

27.6

28

6.4

800kHz

23.5

-49°

27.9

32

6.4

900kHz

twenty two

-52°

28

35.7

6.3

1 MHz

20.7

-54.3°

28.1

39.3

6.3

2 MHz

12

-72.6°

24.9

79.4

6.3

3 MHz

7.8

-79.2°

twenty four

126

6.7

4 MHz

5.8

-81.8°

24.5

171

6.8

5MHz

4.7

-83.5°

24.2

212.7

6.8

10MHz

2.5

-86°

28

319.5

6.3

From the results in Table 3, the C of the ADA4004 can be estimatedDMAbout 6.4 pF. The results also show that over the entire frequency range shown in Table 3, CDMhas a considerable parallel conductance GPnot purely capacitive CDM. Measurements show that the actual input differential resistance of this bipolar op amp is about 40 kΩ (1/25 μS).

Side note: We tried measurements on other types of op amps, such as zero-drift op amps (LTC2050) and high-speed bipolar op amps (LT6200). The results were incoherent, presumably due to switching artifacts in zero-drift op amps and excessive current noise in high-speed bipolar op amps.

Reference conclusion

measure CDM Not difficult. One thing to note is that the HP4192A reports impedance in magnitude and angle. Capacitance readings assume a simple series RC or parallel RC, whereas the input impedance of an op amp can be much more complex. Capacitance readings should not only use the nominal value at the surface. Each op amp has its own unique situation. The frequency range where the input impedance is dominated by capacitive reactance may vary by design. The input stage design, the device and process used, the Miller effect, and packaging can all make a large overall contribution to the differential input impedance and its measurement. Our measurements on JFET input op amps and bipolar input op amps show that CDMResults and R of the bipolar input op ampDMresult.

Input capacitance may become a major specification for high impedance and high frequency operational amplifier (op amp) applications. It is worth noting that when the junction capacitance of the photodiode is small, the input capacitance of the op amp can become a dominant factor in noise and bandwidth problems. The op amp’s input capacitance and feedback resistance create a pole in the amplifier’s response, affecting stability and increasing noise gain at higher frequencies.

Introduction

Input capacitance may become a major specification for high impedance and high frequency operational amplifier (op amp) applications. It is worth noting that when the junction capacitance of the photodiode is small, the input capacitance of the op amp can become a dominant factor in noise and bandwidth problems. The op amp’s input capacitance and feedback resistance create a pole in the amplifier’s response, affecting stability and increasing noise gain at higher frequencies. Therefore, stability and phase margin may decrease, and output noise may increase. In fact, some of the previous CDM(Differential Mode Capacitance) measurement techniques are based on high impedance inverting circuits, stability analysis, and noise analysis. These methods can be very cumbersome.

In a feedback amplifier such as an op amp, the total effective input capacitance is given by CDMwith the negative input common-mode capacitor (or the C to groundCMC) in parallel. CDMOne of the reasons it is difficult to measure is that the main job of an op amp is to prevent the two inputs from being uncorrelated. with measurement CDMCompared to the difficulty of directly measuring the positive input common-mode capacitance C to groundCM+Relatively easy. By placing a large series resistor on the noninverting pin of the op amp and applying a sine wave or noise source, a network analyzer or spectrum analyzer can be used to measure the -3 dB frequency response due to the op amp’s input capacitance. Assuming CCM+and CCMCSame, especially for voltage feedback amplifiers. However, over the years, measuring CDMbecomes increasingly difficult; the inherent nature of the op amp forces its inputs to be equal, bootstrapping CDM, so the various techniques used are unsatisfactory. When the inputs are forced apart and a current measurement is made, the outputs will try to counteract. – detect CDMThe traditional method is indirect measurement, which relies on a reduction in phase margin, and due to the parallel use of CCMCIt becomes more complicated with other capacitors.

We expect the op amp to be tested to operate and function normally in closed loop conditions as the customer would normally use it. A suggested approach is to split the input and clip the output, but this may render the internal circuitry inoperable (depending on the opamp topology), so the measured capacitance may not reflect the actual operating capacitance. In this approach, the input is not over-separated to avoid input stage nonlinearity and excessive output swing or clipping. This article will introduce a simple and straightforward CDMMeasurement methods.

Figure 1. Direct measurement of C in LTspiceDMimpedance. Plot the V(r)/I(R1) curve to get the impedance. In this example, at 1 MHz, Z is 19.89437kΩ at -89.996° (10(85.97/20)), using the formula C = 1/(2π × Z × Freq), Z is exactly 8 pF.

measure CDMnew method

The authors decided to just use a snubber circuit with a gain of 1, and use a current source to excite the output and the inverting input. The output and inverting input will only vary as far as the op amp allows. At low frequencies, there is little variation in the output, so through CDMcurrent will be small. At too high frequencies, the test may be invalid, and the results are useless. But at intermediate frequencies, the gain bandwidth of the op amp drops, but not so low that the output variation still provides a large enough voltage excitation and a measurable pass through CDMthe current.

LTspice®The noise floor is almost unlimited, so a simple test simulation can be performed, as shown in Figure 1. When the technique was found to be fairly accurate and effective in LTspice, the next question was “Can I get enough SNR to make a good measurement in the real world?”

This phase angle is almost equal to -90°, which indicates that the impedance is capacitive. The 2 pF common-mode capacitance will not spoil the measurement because CCMCis not in the path, and 1/(2 ×π × Freq × CCM+) >> 1 Ω.

Challenge: Find the right equipment and actual test setup

As shown in Figure 1, a 2 kΩ resistor is placed in series with the output of the op amp to convert the excitation from a voltage source to a current source. This will allow a small voltage in node “r” (it will not be too far from what is seen in the non-inverting pin of the op amp) and will cause a small current to flow into the C under testDMbetween the inputs. Of course, the output voltage is now small (buffered by the device under test (DUT)), and CDMThe current in is also small (57 nA in this simulation), so it would be difficult to measure with a 1 Ω resistor on a bench. The LTspice.ac and LTspice.tran simulations have no resistor noise, but a real-world 1 Ω resistor with 130 pA/√Hz of noise produces only a 57 nV signal from our expected 57 nA capacitor current. Further simulations show that replacing R1 with 50Ω or 1 kΩ does not result in a flow into C at frequencies within the target bandwidthCM+The current loss is too large. For a better current measurement technique than a simple resistor, a transimpedance amplifier (TIA) can be used in place of R1. The TIA input is connected to the non-inverting pin of the op amp where current is required and the voltage is fixed to virtual ground to eliminate CCMCcurrent in. In fact, this is exactly how four-port impedance analyzers such as the Keysight/Agilent HP4192A are implemented. The HP4192A can perform impedance measurements in the frequency range from 5 Hz to 13 MHz. Some new devices on the market using the same impedance measurement technique include the E4990A impedance analyzer with a 10 Hz to 120 MHz range and a precision LCR meter (like the Keysight E4980A) with a 20 Hz to 2 MHz range.

As shown in the test circuit in Figure 2 below, the non-inverting pin of the op amp remains in a virtual ground state due to the TIA inside the impedance analyzer. Because of this, CCM+Both terminals of the are considered to be at ground potential and therefore do not affect the measurement. C of DUTDMThe small current generated across both ends will flow through the feedback resistor R of the TIArthen measured by the internal voltmeter.


Figure 2.CDMTest the circuit.

Any use of an auto-balanced bridge1The impedance measurement method of the four-port device is to measure CDMsuitable choice. They are designed to generate a sine wave from an internal oscillator centered at zero with positive and negative swings for dual supply operation. If the op amp DUT is powered from a single supply, the bias function should be adjusted so that the signal does not clip to ground. The HP4192A is used in Figure 3 and the detailed connections to the DUT are shown.


Figure 3.CDMTest setup for the direct measurement method.

Figure 4 shows the exact test setup to make the board and wire pair CDMThe parasitic capacitance contribution is minimal. Any general-purpose board can be used for low-speed op amps, while high-speed op amps require more stringent PCB layout. Vertically grounded copper dividers ensure that the input and output terminals are not visible to the DUT CDMParallel other field paths.


Figure 4. HP4192A setup board demo. On the right is excitation and voltage readback through 2 kΩ. The DUT used is an LT1792 in an 8-pin SO package attached to an LB2223 experimenter board. The TIA is located on the left inside the HP4192A.

Results and discussion

First, the DUT is not used when measuring the board capacitance of the board. The board shown in Figure 4 was measured with a 16 fF capacitor and no DUT. This is a fairly small capacitance and can be neglected because usually CDMExpected values ​​are several hundred to several thousand fF.

Most JFET and CMOS input op amps were measurable using this new CDM measurement uses this new CDMMeasurement technique that can measure most JFET and CMOS input op amps. To illustrate the method, take the measurement of the LT1792, a low-noise precision JFET op amp as an example. The following table lists the impedance (Z), phase angle (θ), reactance X over a range of frequenciesSand CDMcalculated value. When the phase angle is -90°, the impedance behaves purely capacitive.

Table 1. LT1792 Impedance Measurements at Various Frequency with ±15 V Supply

frequency

Z (kΩ)

θ

XS (kΩ)

CS = CDM =
1/(2 ×π×XS × Freq) (pF)

500kHz

33

-89°

-32.9

9.7

600kHz

27

-90°

-26.9

9.8

700kHz

22.6

-90°

-22.6

10

800kHz

19.65

-90°

-19.7

10.1

900kHz

17.4

-90°

-17.4

10.2

1 MHz

15.64

-89.9°

-15.6

10.2

2 MHz

7.76

-89.8°

-7.76

10.25

3 MHz

5.1

-90°

-5.1

10.4

4 MHz

3.74

-90°

-3.74

10.6

5MHz

2.92

-90°

-2.92

10.9

Table 1 above gives the measurement results over the frequency range of 500 kHz to 5 MHz. The phase in this frequency range is close to purely capacitive (-89° to -90° phase angle). At the same time, the reactance XSdetermines the total input impedance, ie Z≈XS. CDMThe calculated average value of is about 10.2 pF. The highest measurement frequency is 5 MHz because the device bandwidth is only up to 5.6 MHz. Results at lower frequencies become incoherent. Presumably this is due to the behavior of the op amp causing the output voltage to drop, CDMcurrent is rapidly reduced while XSImpedance becomes larger at low frequencies.

The output of the op amp should also be checked at each step frequency to ensure that it is not overdriven by the signal produced by the impedance analyzer. The amplitude of this signal from the HP4192A is adjustable from 0.1 V to 1.1 V, which is just enough to create a swing in the output of the op amp and slightly shift the voltage level in the inverting input pin. Figure 5 shows that at 800 kHz, the peak-to-peak undistorted signal (green signal) at the output of the op amp is 28 mV. The yellow signal of 2.76 V peak-to-peak amplitude (1 V rms) is detected directly from the oscillator output port of the analyzer. To be fair, the decision to disallow output distortion is arbitrary, either for the DUT or the HP4192A detector. Although this setup is relatively unaffected by probe effects, the probe has been removed when acquiring the actual data for impedance and phase.


Figure 5. Detected output at HP4192A “Osc” output port and op amp output pin.

We carried out measurements of C at different supply voltagesDM‘s test. CDMDependencies on supply and common-mode voltage will vary from op amp to op amp; different topologies and transistor types are expected to result in different junction parasitics for high-voltage and low-voltage supplies. Table 2 shows the results for the LT1792 when the power supply is stable within ±5 V. CDMThe measured average value of 9.2 pF is quite close to the result of 10 pF with a ±15 V supply. Therefore, it can be concluded that the C of the LT1792DMDoes not change significantly with changes in supply voltage. This is the same as CCMIn stark contrast, the latter varies significantly with supply voltage.

Table 2. LT1792 Impedance Measurements at Various Frequency with ±5 V Supply

frequency

Z (kΩ)

θ

XS (kΩ)

CS = CDM (pF)

500kHz

37

-90°

-37

8.6

600kHz

30

-91°

-30

8.8

700kHz

25.3

-91°

-25.2

9

800kHz

twenty two

-91°

-twenty two

9

900kHz

19.5

-91°

-19.5

9

1 MHz

17.5

-91°

-17.5

9.1

2 MHz

8.62

-92°

-8.62

9.2

3 MHz

5.6

-93°

-5.6

9.5

4 MHz

4.07

-94°

-4.07

9.8

5MHz

3.14

-94°

-3.14

10.1

Meanwhile, bipolar input op amps are almost as simple as their FET counterparts. However, since they are related to CDMThe currents are in parallel, so their high input bias current and current noise are noticeable. In addition, the inherent differential resistance R inherent to the bipolar differential pair inputDMalso with CDMin parallel. Table 3 shows the impedance measurement of the low-noise precision amplifier ADA4004 as an example. Obviously, phase does not indicate purely capacitive behavior, since it is far from -90°. Although the 4 MHz, 5 MHz and 10 MHz frequencies are very close, a parallel equivalent impedance RC model will fit this example to be able to extract C from the other resistorsDM. Therefore, the parallel conductance G over a range of frequencies is shown in Table 3Psusceptance BPand CDMThe calculated value of , which assumes CPequal to CDM.

Table 3. ADA4004 Impedance Measurements Over Frequency Range with ±15 V Supply

frequency

Z (kΩ)

θ

GP (μS)

BP (μS)

CP = CDM =
BP/(2 ×π × Freq) (pF)

500kHz

29.4

-36°

27.5

20

6.4

600kHz

27.2

-41°

27.6

24.1

6.4

700kHz

25.3

-45.4°

27.6

28

6.4

800kHz

23.5

-49°

27.9

32

6.4

900kHz

twenty two

-52°

28

35.7

6.3

1 MHz

20.7

-54.3°

28.1

39.3

6.3

2 MHz

12

-72.6°

24.9

79.4

6.3

3 MHz

7.8

-79.2°

twenty four

126

6.7

4 MHz

5.8

-81.8°

24.5

171

6.8

5MHz

4.7

-83.5°

24.2

212.7

6.8

10MHz

2.5

-86°

28

319.5

6.3

From the results in Table 3, the C of the ADA4004 can be estimatedDMAbout 6.4 pF. The results also show that over the entire frequency range shown in Table 3, CDMhas a considerable parallel conductance GPnot purely capacitive CDM. Measurements show that the actual input differential resistance of this bipolar op amp is about 40 kΩ (1/25 μS).

Side note: We tried measurements on other types of op amps, such as zero-drift op amps (LTC2050) and high-speed bipolar op amps (LT6200). The results were incoherent, presumably due to switching artifacts in zero-drift op amps and excessive current noise in high-speed bipolar op amps.

Reference conclusion

measure CDM Not difficult. One thing to note is that the HP4192A reports impedance in magnitude and angle. Capacitance readings assume a simple series RC or parallel RC, whereas the input impedance of an op amp can be much more complex. Capacitance readings should not only use the nominal value at the surface. Each op amp has its own unique situation. The frequency range where the input impedance is dominated by capacitive reactance may vary by design. The input stage design, the device and process used, the Miller effect, and packaging can all make a large overall contribution to the differential input impedance and its measurement. Our measurements on JFET input op amps and bipolar input op amps show that CDMResults and R of the bipolar input op ampDMresult.

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